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A8504 WLED/RGB Backlight Driver for Medium Size LCDs
Features and Benefits
Active current sharing between 6 LED strings for 1.3% typical current matching 1.2% typical current accuracy Drive up to 11 series x 8 parallel = 88 LEDs (Vf = 3.5 V, If = 40 mA) External PWM control for LED dimming An external resistor for LED current setting Boost converter with integrated 50 V, 2 A DMOS LED sinks rated for 45 mA 200 kHz to 2 MHz switching frequency Open LED disconnect Boost current limit, thermal shutdown, and soft start No audible ceramic capacitor noise during PWM dimming Adjustable overvoltage protection (OVP) No pull-up resistors required for LED modules that use ESD capacitors
Description
The A8504 is a multi-output WLED driver for medium display backlighting. The A8504 integrates a boost converter and eight current-sinks to provide a WLED/RGB backlight driver. The boost converter can provide output voltage up to 47 V. The flexible channel selection control and high voltage capability allow a wide range of LED backlight applications. The boost converter is a constant frequency current-mode converter. Each LED channel can sink 45 mA, and channels can be paralleled for higher currents. LED current can be controlled with external PWM duty cycle. The A8504 is available in a 26 pin, 4 mm x 4 mm QFN/MLP package that is only 0.75 mm nominal in height. Applications include: Thin notebook displays LCD TV RGB backlight GPS systems Portable DVD players
Package: 26 pin QFN/MLP (suffix EC)
Approximate Scale 1:1
Typical Application
VIN 5 V 10% CIN 0.1 F/ 10 V VBAT 5 to 24 V L1 10 H CBAT 2.2 F/ 50 V VIN PWM SKIP COMP CC RFSET RISET LED1 LED3 LED5 LED7 LGND FSET ISET SEL3 SEL2 SEL1 LED2 LED8 LED6 LED4 D1 ROVP OVP GND AGND VOUT COUT 2.2 F 50 V
PWM pin dimming: digital PWM input VPWM IOUT
SW SW
A8504
PGND VIN
Figure 1. LCD monitor backlight, driving 11 green, blue, or white LEDs with Vf= 3.5 V, or 18 red LEDs with Vf = 2.2 V, per LED string. Overvoltage protection set to 45 V nominal (40.5 V minimum). See also: Recommended Components table, page 16.
8504-DS, Rev. 1
A8504
WLED/RGB Backlight Driver for Medium Size LCDs
Selection Guide
Part Number Package Packing*
1500 pieces / 7-in. reel A8504EECTR-T 4 mm x 4 mm QFN/MLP *Contact Allegro for additional packing options
Device package is lead (Pb) free, with 100% matte tin leadframe plating.
Absolute Maximum Ratings
Characteristic Symbol Notes Rating Units
SW and OVP Pins LED1 through LED8 Pins VIN Pin Remaining Pins Operating Ambient Temperature Maximum Junction Temperature Storage Temperature TA TJ(max) Tstg Range E VIN
-0.3 to 50 -0.3 to 23 -0.3 to 6 -0.3 to VIN+ 0.3 -40 to 85 150 -55 to 150
V V V V C C C
Package Thermal Characteristics*
Characteristic
Symbol RJA
Note
Measured on 3 in. x 3 in., 2-layer PCB
Rating
48.5
Units
C/W
Package Thermal Resistance *Additional information is available on the Allegro website
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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A8504
WLED/RGB Backlight Driver for Medium Size LCDs
Functional Block Diagram
VIN 5 V 10% CIN COMP CC Reference and Soft Start VIN
VBAT 5 to 25 V CBAT
L1 SW SW
D1
VOUT
COUT
SKIP FSET RFSET AGND GND On/Off SEL1 SEL2 SEL3 PWM 100 k ISET RISET PGND PWM Generator IOUT_SET 100 k Feedback Loop
OSC
Current Sinks
LGND
-
+
-
+
-
+
RQ S ROVP PGND OVP LED1 LED2 LED3 LED4 LED5 LED6 LED7 LED8 Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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A8504
WLED/RGB Backlight Driver for Medium Size LCDs
ELECTRICAL CHARACTERISTICS, valid at TA = -40C to 85C, typical values at TA = 25C, VIN = 5 V, unless otherwise noted
Characteristics Input Voltage Range Undervoltage Lockout Threshold UVLO Hysteresis Window Supply Current Error Amplifier Error Amplifier Open Loop Gain Error Amplifier Unity Gain Bandwidth Error Amplifier Transconductance Error Amplifier Output Sink Current Error Amplifier Output Source Current Boost Controller RFSET = 13 k, SKIP = VIL Switching Frequency Minimum Switch Off-Time Input Voltage Level Low Input Voltage Level High Input Leakage Current (PWM, and SKIP pins) Input Leakage Current (SELx pins) Over Voltage Protection (OVP) Output Overvoltage Rising Limit OVP Sense Current OVP Release Current OVP Leakage Current Boost Switch Switch On Resistance Switch Leakage Current Switch Current Limit Rds(on) ISWleak ISWlim ISW = 1.5 A VSW = 5 V, TA = 25C VSW = 21 V - - - 1.6 225 - 1 2 - 1 - - m A A A VOVP IOVPH IOVPL IOVPleak VVOP = 21 V 28 - - - - 49 44 0.1 32 - - - V A A A fSW tOFFmin VIL VIH IIleak ISELleak VI(pin) = 5 V, TA = 25C RFSET = 26.1 k, SKIP = VIL RFSET = 32.4 k, SKIP = VIH Logic Input Levels (PWM, SELx, and SKIP pins unless otherwise specified) - 1.5 - - - - - - 0.4 - 100 1 V V A A 1.8 - - - 2 1 200 70 2.2 - - - MHz MHz kHz ns AVEA UGBEA GmEA IEAsink IEAsource ICOMP = 10 A VLED1-8 = 1 V VLED1-8 = 0 V - - - - - 60 3 850 280 -280 - - - - - dB MHz A/V A A Symbol VIN VUVLO VUVLOhys ISUP Switching at no load, TA = 25C Shutdown PWM = VIL VIN falling Test Conditions Min. 4.2 - - - - Typ. - - 0.2 5 0.1 Max. 5.5 4 - - 1 Units V V V mA A
Continued on the next page...
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A8504
WLED/RGB Backlight Driver for Medium Size LCDs
ELECTRICAL CHARACTERISTICS (continued), valid at TA = -40C to 85C, typical values at TA = 25C, VIN = 5 V, unless otherwise noted
Characteristics LED Current Sinks LEDx Regulation Voltage ISET to ILEDx Current Gain Voltage on ISET Pin ISET Allowable Current Range LEDx Accuracy VLEDx AISET VISET ISET ErrLEDx RISET = 14.7 k; 100% current ratio, measured as average of LED1 to LED8; LED1 to LED8 = 0.8 V LED1 to LED6; ISET = 83 A , 100% current ratio; LED1 to LED6 = 0.8 V; SEL1=SEL3=VIH; SEL2=VIL LED1 to LED8; ISET = 83 A , 100% current ratio; LED1 to LED8 = 0.8 V; SEL1=SEL2=SEL3=VIH VLEDx= 5 V, PWM = 0, TA = 25C VLEDx= 21 V, PWM =0 Initial soft start current for boost switch Current through enabled LEDx pins during soft start, RISET= 14.7 k 40C hysteresis ISET = 83 A - - - 40 - 800 460 1.23 - 1.2 - - - 100 - mV - V A % Symbol Test Conditions Min. Typ. Max. Units
LEDx1 LEDx Matching LEDx2 LEDx Switch Leakage Current LEDx Switch Leakage Current Soft Start Soft Start Boost Current Limit Soft Start LEDx Current Limit Thermal Shutdown Threshold ISWSS ILEDSS TSHDN ILSleak5 ILSleak21
- - - - -
1.3 -1.7 to 2.5 - 1 1.2 3 165
- - 1 - -
% % A A A mA C
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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A8504
WLED/RGB Backlight Driver for Medium Size LCDs
Performance Characteristics
Efficiency with PWM dimming: PLED/PBAT, VIN = 5 V
VIN = 5 V, 6 ch. with 7 LEDs per ch., 40 mA per ch., fSW = 1 MHz
100 95 Efficiency (%) 90 85 80 75 70 0 20 40 60 80 100 Duty Cycle (%) VBAT (V) 9 15 21 Efficiency (%) 100 95 90 85 80 75 70 0 2 4 6 8 10 Expanded View, Lower Range: Duty Cycle (%) VBAT (V) 9 15 21
VIN = 5 V, 6 ch. with 7 LEDs per ch., 40 mA per ch., fSW = 2 MHz
95 90 Efficiency (%) 85 80 75 70 0 20 40 60 80 100 Duty Cycle (%) Efficiency (%) VBAT (V) 9 15 21 95 90 85 80 75 70 0 2 4 6 8 10 Expanded View, Lower Range: Duty Cycle (%) VBAT (V) 9 15 21
VIN = 5 V, 8 ch. with 8 LEDs per ch., 40 mA per ch., fSW = 1 MHz
95 90 Efficiency (%) 85 80 75 70 0 20 40 60 80 100 Duty Cycle (%) Efficiency (%) VBAT (V) 9 15 21 95 90 85 80 75 70 0 2 4 6 8 10 Expanded View, Lower Range: Duty Cycle (%) VBAT (V) 9 15 21
VIN = 5 V, 8 ch. with 8 LEDs per ch., 40 mA per ch., fSW = 2 MHz
95 90 85 80 75 0 20 40 60 80 100 Duty Cycle (%) VBAT (V) 9 15 21 95 90 85 80 75 0 2 4 6 8 10 Expanded View, Lower Range: Duty Cycle (%) VBAT (V) 9 15 21
Efficiency (%)
Efficiency (%)
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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A8504
WLED/RGB Backlight Driver for Medium Size LCDs
Performance Characteristics
Turn-On with PWM Signal
VIN = 5 V, VBAT = 15 V; fPWM= 100 Hz; fSW= 1 MHz 8S8P configuration, 40 mA per channel
50% Duty Cycle
PWM PWM
1% Duty Cycle
C1
C1
C2
IIN VOUT
C2
IIN VOUT
C3 C4 IOUT t
C3 C4 IOUT t
Symbol C1 C2 C3 C4 t
Parameter VPWM IIN VOUT IOUT time
Units/Division 5V 500 mA 10 V 200 mA 5 ms
Symbol C1 C2 C3 C4 t
Parameter VPWM IIN VOUT IOUT time
Units/Division 5V 500 mA 10 V 200 mA 20 ms
Soft Start Operation
VIN = 5 V, VBAT = 15 V; fSW= 1 MHz 8S8P configuration, 40 mA per channel
PWM C1
IIN C2 C3 C4 IOUT t VOUT
Symbol C1 C2 C3 C4 t
Parameter VPWM IIN VOUT IOUT time
Units/Division 5V 500 mA 10 V 200 mA 200 s
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A8504
WLED/RGB Backlight Driver for Medium Size LCDs
Functional Description
The A8504 is a multioutput WLED driver for medium display backlighting. The A8504 works with 4.2 to 5.5 V input supply, and it has an integrated boost converter to boost battery voltage up to 47 V, 40 mA per LED string. An inductor can be connected to a separate power supply, VBAT , from 5 to 25 V, with the A8504 IC powered from a 5 V source. The LED sinks can sink up to a 45 mA current. The boost converter is a constant frequency current-mode converter. The integrated boost DMOS switch is rated for 50 V at 2 A. This switch has pulse-by-pulse current limiting, with the current limit independent of duty cycle. The switch also has output overvoltage protection (OVP), with the OVP level adjustable, typically from 30 to 47 V, as described in the Device Internal Protection section. The A8504 has individual open LED detection. If any LED opens, the corresponding LED pin is removed from regulation logic. This allows the remaining LED strings to function normally, without excessive power dissipation. The switching frequency, fSW, can be set from 600 kHz to 2 MHz by a single resistor, RFSET, connected across the FSET and AGND pins, and with the SKIP pin set to logic low (see figure 2). The switching frequency is set as: FSW = 26.03 / RFSET , where FSW is in MHz and RFSET is in k When the SKIP pin is connected to logic low, switching frequency is as set by RFSET.
When the SKIP pin is connected to logic high, the switching frequency is divided by 4. The SKIP pin can be used to reduce switching frequency in order to reduce switching losses and improve efficiency at light loads. The IC offers a wide-bandwidth transconductance amplifier with external COMP pin. External compensation offers optimum performance for the desired application. The A8504 has eight well-matched current sinks to provide regulated current through LEDs for uniform display brightness. The quantity of LEDx pins used is determined by the SELx pins. Refer to table 1 for further description. The boost converter is controlled such that the minimum voltage on any LEDx pin is 800 mV. In a typical application, the LEDx pin connected to the LED string with the maximum voltage drop controls the boost loop, so the remaining pins will also have the higher voltage drop. All LED sinks are rated for 21 V, to allow PWM dimming control. LED Current Setting The maximum LED current can be set at up to 45 mA per channel, by using the ISET pin. To set the reference current, ISET , connect a resistor, RISET, between this pin and ground, valued according to the following formula: ISET = 1.23 / RISET , where ISET is in mA and RISET is in k.
2.5 2.0 fSW (MHz) 1.5 1.0 0.5 0 10 20 30 40 50 RFSET (k)
Table 1. LEDx Channel Enable Table
SEL1 0 1 0 1 0 1 0 1 SEL2 0 0 1 1 0 0 1 1 SEL3 0 0 0 0 1 1 1 1 LEDx Outputs Only LED1 on LED1 through LED2 on LED1 through LED3 on LED1 through LED4 on LED1 through LED5 on LED1 through LED6 on LED1 through LED7 on LED1 through LED8 on
Figure 2. Switching frequency setting by value of RFSET.
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A8504
WLED/RGB Backlight Driver for Medium Size LCDs
pins sink 1/16 of the set 100% current until all of the enabled LEDx pins reach 0.8 V. After the IC comes out of soft start, the boost current and the LEDx pin currents are set to 100% current. The output capacitor charges to the voltage level required to supply full LEDx current within a few cycles. The startup sequence is shown in the Soft Start chart in the Performance Characteristics section. The IC is shut down immediately when PWM goes low. Device Internal Protection
Overcurrent Protection (OCP). The A8504 has a pulse-by-pulse
This current is multiplied internally with a gain of 480, and then mirrored on all enabled LEDx pins. This sets the maximum current through the LEDs, referred to as "100% current." The LED current can be reduced from 100% by on/off control (PWM) with an external PWM signal on the PWM pin
On/off Control (PWM) with an External PWM Signal on the PWM Pin. When the PWM pin is pulled high, the A8504 turns on
and all enabled LEDx pins sink 100% current. When the PWM pin is pulled low, the IC shuts down with the LEDx pins disabled. External PWM applied to the PWM pin should be in the range of 100 to 400 Hz for optimal accuracy. At startup, the output capacitor is discharged and the IC enters soft start. The boost current is limited to 1 A, and all active LEDx
current limit of 2 A on the boost switch. This current limit is independent of duty cycle.
Thermal Shutdown Protection (TSD). The IC shuts down when
junction temperature exceeds 165C and restarts when the junction temperature falls by 40C.
C1 C2 VPWM VOUT
Overvoltage Protection (OVP). The A8504 has overvoltage
C3
IOUT
protection to protect the IC against output overvoltage. The overvoltage level can be set, from 30 to 45 V typical, with an external resistor, ROVP, as shown in figure 5. When the current though the OVP pin exceeds 49 A, the OVP comparator goes high. When the OVP pin current falls below 44 A, OVP is reset. Calculate the value for ROVP as follows: ROVP = (VOVP - 30) / 49 A , where VOVP is the desired typical OVP level in V, and ROVP is in . For tighter OVP limits, a low-leakage-current Zener diode, DZ, can be used, instead of ROVP, to set OVP at up to 47 V. For redundancy, DZ can be connected across ROVP to provide additional protection, if ROVP should open. Select a 17 V low-leakage Zener diode for DZ.
t
Symbol C1 C2 C3 t
Parameter VPWM VOUT(ac) IOUT time
Units/Division 2.00 V 500 mV 200 mA 5 ms
Figure 3. Output Voltage Ripple During PWM Dimming. VIN= 5 V, VBAT= 15 V, fSW= 1 MHz, fPWM= 100 Hz, PWM duty cycle = 50%, 8S8P configuration, 40 mA per channel.
VPWM C1 VOUT Turn-on Delay 6 s Typical VPWM
100% Current Level Shutdown (0 A) IOUT t
Shutdown (0 A) C2
IOUT
Figure 4. Timing of turn-on delay and turn-off delay when using the PWM pin. VIN= 5 V, VBAT= 15 V, fSW= 1 MHz, fPWM= 100 Hz, 8S8P configuration, 40 mA per channel.
Symbol C1 C2 t
Parameter VPWM IOUT time
Units/Division 2.00 V 200 mA 5 s
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A8504
WLED/RGB Backlight Driver for Medium Size LCDs
Open LED Protection. The A8504 has protection against open LEDs. If any enabled LED string opens, voltage on the corresponding LEDx pin goes to zero. The boost loop operates in open loop till the OVP level is reached. The A8504 identifies the open LED string when overvoltage on the OVP pin is detected. This string is then removed from the boost controlling loop. The boost circuit is then controlled in the normal manner, and the output voltage is regulated, to provide the output required to drive the remaining strings. If the open LED string is reconnected, it will sink current up to the programmed current level.
VIN SW SW
D1
VOUT
ROVP OVP 28.8 V
DZ
COUT
A
OVP Disable
- +
1.23 V
22 k
Note: Open strings are removed from boost regulation, but not disabled. This keeps the string in operation if LEDs open for only a short length of time, or reach OVP level on a transient event. The disconnected string can be restored to normal mode by reenabling the IC. It can also be restored to normal operation if the fault signal is removed from the corresponding LEDx pin, but an OVP event occurs on any other LEDx pin.
4.4 k
Figure 5. Overvoltage protection circuit. Three alternative configurations at (A) are available, as follows:
External Component ROVP only DZ only both ROVP and DZ OVP Rating up to 45 V up to 47 V redundancy
C1
VPWM
C1
VPWM
Startup C2 Overvoltage condition detected
VPWM VOUT Normal operation established
IIN C2
LED opens Normal operation Overvoltage condition detected Normal operation restored with open LED string removed from control loop
IIN VOUT
VOUT
IOUT C4 C3
IOUT
IOUT
t
C4 C3
t
Symbol C1 C2 C3 C4 t
Parameter VPWM IIN vout Iout time
Units/Division 5.00 V 500 mA 5.00 V 200 mA 200 s
Symbol C1 C2 C3 C4 t
Parameter VPWM IIN vout Iout time
Units/Division 5.00 V 500 mA 5.00 V 100 mA 200 s
Figure 4. Timing of overvoltage protection (OVP) function when open LEDs are detected at startup (left ) and during normal operation (right).
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A8504
WLED/RGB Backlight Driver for Medium Size LCDs
Application Information
Design Example This section provides a method for selecting component values when designing an application using the A8504.
Assumptions For the purposes of this example, the following are
5. Select resistor ROVP (connect to the OVP pin to set the OVP level, VOUT(max)). Given Vf (max) = 3.4 V, then: VOUT(max) = 3.4 x 8 + 0.5 = 27.7 V . (3) With a 15% margin, to set the output OVP level, given an IOVPH of 49 A typical, and VOVP = 30 V: ROVP = (32 - 30) / 49 = 40.8 k . Select a common value: 41.2 k. 6. Select inductor L1. This should assume a maximum duty cycle, D(max), at VBAT(min) and 90% efficiency. D = 1- (VBAT x ) / VOUT D(max) = 1- (8 x 0.9) / 27.7 = 74% . Then calculate maximum switch on-time: ton(max) = D(max) / fSW = 0.74 / 2 MHz = 370 ns . Maximum input current can be calculated as: IBAT = (VOUT x IOUT) / (VBAT(min) x ) IBAT(max) = [27.7 (40 x 6)] / (8 x 0.9) = 923 mA . Set inductor ripple at 60% of IBAT(max): IL = 0.6 x 923 = 554 mA Given, during switch on-time: VBAT = L x IL x fSW / D 8 = L x 0.554 x 2 / 0.74, and L = 5.3 H . Select a common value, 6.8 H. It is recommended to select an inductor that can handle a DC current level that is greater than 923 mA, at the peak current level (saturation) of 923 mA + 554 / 2 = 1200 mA. This is to ensure that the inductor does not saturate at any steady state or transient condition, within specified temperature and tolerance ranges. Inductor saturation level decreases with increasing temperature. It is advisable to use a inductor with a saturation level of 1.6 A, because the switch current limit is 1.8 A typical. The inductor should have a minimum DC resistance and core loss for better efficiency.
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given as the application requirements: * * * * * * * * VBAT: 8 to 21 V VIN: 5 V Quantity of LED channels: 6 Quantity of LEDs per channel: 8 LED current per channel, ILED: 40 mA Vf at 40 mA: 3 to 3.4 V fSW: 2 MHz TA(max): 65C
(4)
(5)
Dimming Use a 100 Hz PWM signal on the PWM pin. The
A8504 can work with wide range of PWM frequencies, taking about 6 s typical (10 s maximum) to turn on. This delay may have a noticeable effect at high PWM frequencies combined with low duty cycles. For example, at 100 Hz and 10% duty cycle, the PWM on-period is 1 ms. In that period, a delay of 6 s causes only a 0.6% error. If the PWM frequency is 1 kHz, this error is 6%. However, error due to turn-on delay can be nullified by increasing the applied PWM duty cycle.
Procedure The procedure consists of selecting the appropriate
(6)
(7)
configuration and then the individual component values, in an ordered sequence. 1. Identify the SELx pins to use. For 6 channels: * connect pins SEL1 and SEL3 to VIN * connect pin SEL2 to AGND 2. Connect LEDs to pins LED1 through LED6 (leave pins LED7 and LED8 open). 3. Select resistor RISET (connected between pin ISET and AGND). Given ILED = 40 mA and VISET = 1.23 V typical, then: RISET = 1.23 / (40/460) = 14.2 k . (1) Select a common value: 14.3 k, 1%. 4. Select resistor RFSET (connected between pin FSET and AGND). Given: RFSET = 26.03 /fSW , for a 2 MHz switching frequency, select: RFSET = 26.03 / 2 = 13 k . (2)
(8)
11
A8504
WLED/RGB Backlight Driver for Medium Size LCDs
7. Select output capacitor COUT (connect between the A8504 and the LEDs), given: COUT = IOUT x ton / VOUT , (9) where IOUT is the total output current, and VOUT is the output voltage ripple, 0.5% of VOUT (0.05 x 27.7 = 0.14 V). Then: COUT = (40 mA x 6) x 370 ns / 0.14 = 0.63 F . Select a ceramic capacitor with a 35 or 50 V rating, X5R or X7R grade. Usually capacitance at 35 V drops significantly compared to the 0 V specification. Typically, this requires the selection of a 2.2 F capacitor to compensate for DC voltage bias derating. The rms current through capacitor should be selected such that internally-generated temperature rise is limited to 10C to 20C. The rms current through COUT is given by: ICOUTrms = IOUT x [(D+r2 / 12) / (1 - D)] 1/2 , where r = IL / IBAT = 0.554 mA /0.923 mA = 0.6. COUT should have an rms current rating greater than: (40 mA x 6 )x {[0.74 + (0.36 / 12)]/(1-0.74)}1/2 = 0.48 A. 8. Select input capacitor CBAT (connect to battery input), given: CBAT = IL / (VBAT(min) x fSW x VINripple , (11) where VINripple is the input ripple voltage, which can be assumed to be 1% of VBAT. Then: CIN = 0.554 mA/(8 x 2 MHz x 0.08) = 0.4 F . Select a 1 F or higher, 25 or 35 V, ceramic capacitor, X5R or X7R grade.
ILED(max) 25 25 25 25 25 25 25 25 50 50 50 50 100 100 200 Quantity of Strings 8 7 6 5 4 3 2 1 4 3 2 1 2 1 1 SEL1 H L H L H L H L H H H H H H H SEL2 H H L L H H L L H L H L H H H SEL3 H H H H L L L L H H L L H L H LED1
The rms current through capacitor should be selected such that internally-generated temperature rise is limited to 10C. The rms current through CBAT is given by: IBATrms = (IOUT x r) / [(1 - D) x 3.46 ], = [(40 mA x 6 )x 0.6] / [(1 - 0.74) x 3.46] = 160 mA . 9. Select the boost diode D1 (connect between the SW pins and the output). D1 should be a Schottky diode with low forward drop and junction capacitance. The diode reverse voltage rating should be greater than VOUT. A 50 V diode rating is recommended. The diode DC current rating should be greater than IOUT and the peak repetitive current rating should be greater than IBAT + IL / 2. 10. Select the compensation capacitor CC (connect between the COMP pin and ground. Typically, use a 0.1 to 0.47 F capacitor for stability. High Output Current Operation LED strings can be paralleled for higher current. The A8504 can sink up to 40 mA through each sink. These outputs can be connected together with various possibilities for higher current as shown in figure 7. As an example, for an application with up to 50 mA using 3 parallel strings: LED1 connected with LED2, LED3 with LED4, and LED5 with LED6; LED7 and LED8 open; SEL1 and SEL3 set logic high, and SEL2 set low.
LED2 LED3 LED4 LED5 LED6 LED7 LED8 NC NC NC NC NC NC NC NC NC NC NC
(12)
(10)
NC
Connect Connect Connect Connect
NC NC
NC NC NC
NC NC NC NC
NC NC NC NC NC
NC NC NC NC NC NC NC NC NC NC
Connect Connect Connect
Connect Connect
Connect
NC
Connect Connect
NC
NC NC NC
NC NC NC
Connect Connect
Figure 7. LED strings can be combined to allow various maximum current levels to be applied. The "Connect" notes indicate LED strings connected together.
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A8504
WLED/RGB Backlight Driver for Medium Size LCDs
Typical Application Circuits A typical application circuit for dimming an LCD monitor backlight with multiple LED strings is shown in figure 1. Figure 8 shows two dimming methods: digital PWM control (PWM signal on the PWM pin) and analog PWM control, with the analog signal, VA , applied to the ISET pin through a resistor, RA. The current flowing through RA can be calculated as: IA = VA/ RA . This current changes the reference current, ISET, as follows: ISET = VSET / RSET - (VA - VSET) / RA . LED current can be changed by changing VA. ISET can be changed in the range from 40 A to 100 A.
Accuracy (%)
ISET RISETP RISET
Q1
Figure 9. Configuration for 1000:1 dimming.
100 95 90 85 80 75 0.1
Application Circuit for 1000:1 Dimming Level
A wider dimming range can be achieved by changing the reference current, ISET, while using PWM dimming. For higher output, current levels turn on Q1. RISET and RISETP set the 100% current level. This current level can be set to 45 mA, and then it can be dimmed by applying 100% to 0.25% duty cycle on the PWM pin. The reference current can be reduced by turning off Q1. LED current can be dimmed to 18 mA by reducing reference current through ISET pin. This provides 1000:1 combined dimming level range. Figure 10 shows the accuracy, ErrLEDX , results using this circuit.
VIN 5 V 10% CIN VIN PWM SKIP COMP CC FSET RFSET VA RISET RA ISET VBAT 24 V
1.0 10.0 Dimming Level (%)
100.0
Figure 10. Typical accuracy, normalized to the 100% current level, versus dimming level, with FPWM = 100 Hz.
VOUT ROVP COUT
SW SW
OVP GND AGND PGND SEL3 SEL2 SEL1 VIN
A8504
LED2 LED1 LED3 LED5 LED7 LGND LED8 LED6 LED4
Figure 8. Typical application circuit for PWM dimming, using digital PWM (on the PWM pin).
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A8504
WLED/RGB Backlight Driver for Medium Size LCDs
VIN 5 V 10%
VBAT 24 V CIN VIN PWM SKIP COMP CBAT
VOUT ROVP SW SW OVP GND AGND PGND SEL3 SEL2 SEL1 VIN COUT
A8504
CC RFSET
FSET ISET RISET
LED1 LED8 LED7 LED6 LED5 LGND LED4 LED3 LED2
Figure 11. Typical application circuit for PWM dimming, using digital PWM (on the PWM pin). Showing configuration of 16 WLEDs at 160 mA, in two strings of 8 LEDs each.
VIN 5 V 10% CIN PWM SKIP VIN
VBAT 24 V
L1 10 H CBAT SW
D1 ROVP SW OVP
VOUT COUT 2.2 F
All ESD capacitors across LED arrays are 0.1 F
PGND CC 0.1 F RFSET COMP FSET SEL3 AGND GND ISET RISET SEL2 SEL1 LED1 VIN
A8504
LED8 LED7 LED6 LED5 LGND LED4 LED3 LED2
Figure 12. Typical application circuit for LED modules with ESD capacitors.
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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A8504
WLED/RGB Backlight Driver for Medium Size LCDs
PCB Layout Guidelines The A8504 evaluation board provides a useful model for designing application circuit layouts. The following guidelines should be observed: * Place the supply bypass capacitor, C8, close to the VIN pin and the ground plane. * Route analog ground, digital signal ground, LED ground (LGND pin), and power ground (PGND pin) separately. Connect all these grounds at the pad for the exposed thermal pad under the A8504, serving as a star ground. * Place the input capacitors, C2 and C7, the inductor, L1, the boost diode D1, and the internal MOSFET and output capaci-
tor, C4, so that they form the smallest loop practical. Avoid long traces for these paths. * Place the RISET, RFSET, and OVP resistors and the compensation capacitor, C5, close to the ISET, FSET, OVP, and COMP pins, respectively. * Provide a substantial solder pad under the exposed thermal pad on the bottom side of the A8504, to provide good thermal conduction. Connect the PCB solder pad to the PCB ground plane with multiple thermal vias. For a thermal via specification, please refer to JEDEC guidelines. * For best thermal performance, avoid thermal stresses.
L1 VIN
CIN GND
26 25 24 23 AGND OVP VIN SW SW 22
VBAT CBAT COUT
D1 ROVP
VOUT
CC
1 2 3 4 5 6 7
PGND SKIP COMP FSET ISET GND LED1
PAD
PGND
21
20 PWM GND 19 18 17 16 15
RPWM
A8504
SEL3 SEL2 SEL1 LED2
LGND
LED3
LED5
LED7
LED8
LED6 13
10
12
Figure 13. Schematic diagram of A8504 typical application circuit and composite view of typical PCB layout. In the composite view, the red line superimposed represents the current loop during switch on-time (return through the A8504 device and the PCB ground plane). The green line represents the current loop during off-time. Both of these loops should be designed to be as short as practicable.
14
11
8
9
LED4
RFSET
RISET
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
15
A8504
WLED/RGB Backlight Driver for Medium Size LCDs
Figure 14. A8504 typical PCB layout silkscreen layer.
Figure 15. A8504 typical PCB layout top signal layer (left) and bottom ground plane layer (right)
Recommended Components Table (for application shown in figure 1)
Component Capacitor Capacitor Capacitor Diode IC Inductor Resistor Resistor Resistor Reference Designator CBAT COUT CIN, CC D1 A8504 L1 RISET RFSET ROVP Value 2.2 F / 50 V 2.2 F / 50 V 0.1 F / 6.3 V 60 V / 1.5 A - 10 H 4.7 H 4.7 H 14.3 k 24 k 270 k Part Number TDK TDK IR 10MQ060NTRPBF A8504 SLF6028T-100M1R3-PF VLS4012T-4R7M1R1 NR4012T4R7M International Rectifier Allegro MicroSystems TDK TDK Taiyo Yuden Vendor
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
16
A8504
WLED/RGB Backlight Driver for Medium Size LCDs
Pin-out Diagram
26 AGND 22 OVP 21 PGND 20 PWM 19 GND EP 18 SEL3 17 SEL2 16 SEL1 15 LED2 LED7 10 LED8 12 LED6 13 LGND 11 LED4 14 8 9 25 VIN 24 SW 23 SW
PGND SKIP COMP FSET ISET GND LED1
1 2 3 4 5 6 7
LED3
(Top View)
Terminal List Table
Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 - Name PGND SKIP COMP FSET ISET GND LED1 LED3 LED5 LED7 LGND LED8 LED6 LED4 LED2 SEL1 SEL2 SEL3 GND PWM PGND OVP SW SW VIN AGND EP Power ground pin. Reduces boost switching frequency in case of light load to improve frequency. Normally, this pin should be low; when high, fSW is divided by 4. Compensation pin; connect external compensation network for boost converter. Sets boost switching frequency. Connect RFSET from FSET to GND to set frequency. Range for RFSET is 13 to 40 k. Sets 100% current through LED string. Connect RISET from ISET to GND. Range for RISET is 8.45 to 30 k. Connect to AGND. LEDx capable of 45 mA. Power ground pin for LED current sink. LEDx capable of 45 mA. Description
SEL1, SEL2, and SEL3 decide active LED strings. Connect to AGND. On/off and on/off LED current control with external PWM. Apply logic level PWM for PWM controlled dimming mode. When unused, connect to AGND. Power ground pin. Connect to this pin to output capacitor +Ve node through a resistor to enable OVP (overvoltage protection). Default OVP level with 0 resistor is 30 V, and it can be programmed up to 47 V. DMOS drain node. Input supply for the IC. Decouple with a 0.1 F ceramic capacitor. Circuit ground pin. Exposed pad. Electrically connected to PGND and LGND; connect to PCB copper plane for heat transfer.
LED5
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
17
A8504
WLED/RGB Backlight Driver for Medium Size LCDs
Package EC, 4 x 4 mm 26-Pin QFN/MLP
0.20 4.00 26 1 2 A 4.00 1.23 26 0.95 1 2 C 0.40
1.10 4.00
Top View 2.45 4.00 27X D 0.08 C 0.20 0.40 0.40 All dimensions nomianl, not for tooling use (reference JEDEC MO-220WGGE) Dimensions in millimeters Exact case and lead configuration at supplier discretion within limits shown A Terminal #1 mark area B Exposed thermal pad (reference only, terminal #1 identifier appearance at supplier discretion) C Reference land pattern layout (reference IPC7351 QFN40P400X400X80-29M) All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances; when mounting on a multilayer PCB, thermal vias at the exposed thermal pad land can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5) D Coplanarity includes exposed thermal pad and terminals SEATING PLANE 0.75 C PCB Layout Reference View
B
1.23
2 1 26 2.45 Bottom View
1.10
Copyright (c)2007, Allegro MicroSystems, Inc. The products described here are manufactured under one or more U.S. patents or U.S. patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro's products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. For the latest version of this document, visit our website: www.allegromicro.com
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
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